High performance, custom FPGA Design solutions

When it comes to FPGA design, we specialize in a wide range of applications including high speed data acquisition and processing, video processing, high speed memory and network interfaces, advanced algorithm development, ASIC prototyping and feasibility study, and much, much more.

With over 10 years of experience in the industry, we offer a great variety of services ranging from RTL design (using VHDL, Verilog, SystemVerilog and System C) to Testing and Verification so you can rest assured that your needs will be met. Our FPGA engineers have worked with a wide range of devices including those form Xilinx, Intel, Lattice, Gowin and are proficient in RTL design. We make use of a multitude of tools to save time and cost in our design: synthesis of Matlab/Simulink components, IP integration, ChipScope Pro, scripting for design automation and testing.

ASIC manufacturing is a very costly and time-consuming process. Our team of experts can reliably Prototype your ASIC design on an FPGA. The advantages this brings are numerous

  • Design test and verification using real life scenarios
  • Reduce the number of revisions needed
  • Provides a platform for developing drivers, firmware, and software
  • Proof of concept
  • Speed up testing of the ASIC after manufacture

All these advantages can translate to significant reductions in development cost and time-to-market.

High speed, high complex designs

At NeuronicWorks we take a systematic approach to any project. We start by analyzing the requirements and generate a structured workflow which is guaranteed to save time and deliver accountable results.

With FPGAs the possibilities are endless. They offer remarkable flexibility in the design, but that also means that special care needs to be taken during the design phase to ensure optimal results. Our FPGA engineers work closely with our Hardware and Software teams to ensure that the design is efficiently split between software and hardware in the FPGA. An efficient Hardware-Software split ensures a cost-effective solution by minimizing the size of the FPGA being used, as well as minimizing the BOM. This translates in a considerable cost save when scaling the design.

We use a wide range of tools to save time during development. This may include building behavioral models using Matlab and Simulink, using IP cores integration tools or by simply using our very own IP core libraries.

Our FPGA engineers are proficient in RTL design in a variety of languages (VHDL, Verilog, SystemVerilog and System C) so you can be assured that your needs are met in a timely fashion.

Being able to measure the performance of the system is very important. We use a variety of tools (ChipScope Pro, Signal Tap, Test benches etc.) to perform timing analysis, bandwidth measurements and give a detailed characterization of the design. We use this information to increase the cost efficiency of the design.

Our team of engineers has experience with a broad range of protocols and algorithms, which makes us confident in our ability to create functional solutions. We have hands-on experience with:

  • Communication Protocols (MIPI, UART, SPI, I2C, 1-Wire, PCM, PCIe, TCP/IP)
    • Communication Drivers
      • UART/RS-232
      • USB (host and device)
      • RS-485, CAN
      • SPI, Quad SPI
      • Cellular (2G, 3G, 4G/LTE)
      • Modbus RTU
      • NFC
    • Video interfaces (HDMI, MIPI)
    • Audio interfaces (I2S, SAI)
  • Related TCP/IP Functions
    • TCP, UDP, SMTP, HTTP, MQTT, BACnet
    • TLS/SSL and IPsec security
    • Embedded HTTP server, including UX/UI design (for dedicated web server devices, and for the AP phase of headless commissioning)
    • Communication of telemetry data with the cloud (custom protocols such as REST-oriented approaches, and popular infrastructures like Amazon AWS)
    • Over-the-air (OTA) firmware update
  • RF & Wireless Communication (802.15.4 MAC, ZigBee, Zwave,Thread, Bluetooth, Wi-Fi, LoRa, NFC, RFID)
  • WiFi Functions
    • Station (STA) mode
    • Access point (AP) mode
    • Commissioning of “headless” WiFi devices
  • Data processing and DSP Algorithms
  • Multi-Sensor Arrays
  • User Interfaces and Custom Keyboards, Custom Displays and Human Machine Interfaces (HMI)
  • Motor Drivers and Controllers
  • Google Assistant, Amazon Alexa, IFTTT, Nest, Smart Things integration
  • Communication with applications (Android, iOS, Windows)
  • Cloud integration (AWS, Google, IBM, etc.)
  • lwIP
  • OpenSSL
  • Mbed TLS
  • OpenCV
  • OpenVPN
  • TouchGFX
  • STemWin
  • Video4Linux2
  • GStreamer
  • CUDA
  • Interfacing with storage media (flash, EEPROM, SD card, eMMC, SDRAM)
  • Signal conditioning and analog-to-digital conversion of sensor data
  • PID motor control
  • Data logging
  • FatFs file system implementation
  • Image and video processing (using OpenCV and CUDA)
  • Graphical user interfaces (using TouchGFX and STemWin)
  • Automotive diagnostics (ELM327, OBD-II, J1939, ISO 15765-4)
  • Data integrity and authenticity (hashing algorithms, checksum, CRC)
  • Apple MFi compliance
  • Building Linux distributions for embedded projects using Yocto

requirement analysis

At NeuronicWorks we take a systematic approach to any project. We start by analyzing the requirements and generate a structured workflow which is guaranteed to save time and deliver accountable results.

hardware-software codesign

With FPGAs the possibilities are endless. They offer remarkable flexibility in the design, but that also means that special care needs to be taken during the design phase to ensure optimal results. Our FPGA engineers work closely with our Hardware and Software teams to ensure that the design is efficiently split between software and hardware in the FPGA. An efficient Hardware-Software split ensures a cost-effective solution by minimizing the size of the FPGA being used, as well as minimizing the BOM. This translates in a considerable cost save when scaling the design.

development and synthesis

We use a wide range of tools to save time during development. This may include building behavioral models using Matlab and Simulink, using IP cores integration tools or by simply using our very own IP core libraries.

Our FPGA engineers are proficient in RTL design in a variety of languages (VHDL, Verilog, SystemVerilog and System C) so you can be assured that your needs are met in a timely fashion.

testing and verification

Being able to measure the performance of the system is very important. We use a variety of tools (ChipScope Pro, Signal Tap, Test benches etc.) to perform timing analysis, bandwidth measurements and give a detailed characterization of the design. We use this information to increase the cost efficiency of the design.

protocols and algorithms

Our team of engineers has experience with a broad range of protocols and algorithms, which makes us confident in our ability to create functional solutions. We have hands-on experience with:

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